DAC5674IPHPR

DAC5674IPHPR Manufacturer

DAC5674IPHPR Description

DAC5674IPHPR Description

DAC5674IPHPR Datasheet (PDF)

DAC5674IPHPR Price & Availability

DAC5674IPHPR Features

• 200-MSPS Maximum Input Data Rate
• 400-MSPS Maximum Update Rate DAC
• 76-dBc SFDR Over Full First Nyquist Zone With Single Tone Input Signal (F_out = 21 MHz)
• 74-dBc ACPR W-CDMA at 15.36 MHz IF
• 69-dBc ACPR W-CDMA at 30.72 MHz IF
• Selectable 2x or 4x Interpolation Filter
  • Linear Phase
  • 0.05-dB Passband Ripple
  • 80-dB Stopband Attenuation
  • Stopband Transition 0.4-0.6 Fdata
  • nterpolation Filters Configurable in Either Low-Pass or High-Pass Mode, Allows For Selection Higher Order Image
• On-chip 2x/4x PLL Clock Multiplier, PLL Bypass Mode
• Differential Scalable Current Outputs: 2 mA to 20 mA
• On-Chip 1.2-V Reference
• 1.8-V Digital and 3.3-V Analog Supply Operation
• 1.8/3.3-V CMOS Compatible Interface
• Power Dissipation: 435 mW at 400 MSPS
• Package: 48-Pin TQFP
• APPLICATIONS
  • Cellular Base Transceiver Station Transmit Channel
    • CDMA: W-CDMA, CDMA2000, IS-95
    • TDMA: GSM, IS-136, EDGE/UWC-136
  • Test and Measurement: Arbitrary Waveform Generation
  • Direct Digital Synthesis (DDS)
  • Cable Modem Termination System

DAC5674IPHPR Parameters

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