| DAC5686 Description |
| 16 Bit 500 MSPS Dual DAC, 16x interpolation, high-performance |
| DAC5686 Vendor |
| Texas Instruments |
| DAC5686 Categories |
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| DAC5686 Features |
- 500 MSPS Maximum Update Rate DAC
- WCDMA ACPR
- 1 Carrier: 76 dB Centered at 30.72-MHz IF, 245.76 MSPS
- 1 Carrier: 73 dB Centered at 61.44-MHz IF, 245.76 MSPS
- 2 Carrier: 72 dB Centered at 30.72-MHz IF, 245.76 MSPS
- 4 Carrier: 64 dB Centered at 92.16-MHz IF, 491.52 MSPS
- Selectable 2×, 4×, 8× and 16× Interpolation
- Linear Phase
- 0.05-dB Pass-Band Ripple
- 80-dB Stop-Band Attenuation
- Stop-Band Transition 0.4-0.6 fDATA
- 32-Bit Programmable NCO
- On-Chip 2×-16× PLL Clock Multiplier with Bypass Mode
- Differential Scalable Current Outputs: 2 mA to 20 mA
- On-Chip 1.2-V Reference
- 1.8-V Digital and 3.3-V Analog Supplies
- 1.8-V/3.3-V CMOS Compatible Interface
- Power Dissipation: 950 mW at Full Maximum Operating Conditions
- Package: 100-Pin HTQFP
- APPLICATIONS
- Cellular Base Transceiver Station Transmit Channel
- CDMA: W-CDMA, CDMA2000, IS-95
- TDMA: GSM, IS-136, EDGE/UWC-136
- Baseband I and Q Transmit
- Input Interface: Quadrature Modulation for Interfacing With Baseband Complex Mixing ASICs
- Single-Sideband Up-Conversion
- Diversity Transmit
- Cable Modem Termination System
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| DAC5686 Datasheet and Application Notes |
|
| Parameter | Value |
| Resolution (Bits) | 16 |
| Settling Time (us) | 0.012 |
| Update Rate (MSPS) | 500 |
| Power Consumption (Typ) (mW) | 445 |
| Output Type | Current |
| Current Range (mA) | 20 |
| Architecture | I-steering |
| DAC: Channels | 2 |
| Analog Voltage AV/DD (Min) (V) | 3 |
| Analog Voltage AV/DD (Max) (V) | 3.6 |
| Logic Voltage DV/DD (Min) (V) | 1.65 |
| Logic Voltage DV/DD (Max) (V) | 1.95 |
| DNL (Max) (+/-LSB) | 9 |
| INL (Max) (+/-LSB) | 12 |
| SNR (Typ) (dB) | 72 |
| SFDR (Typ) (dB) | 72 |
| Pin/Package | 100HTQFP |
| Approx. 1KU Price (US$) | 38 |
| Products related to DAC5686 |
| DAC5686IPZP |