SMJ320C6203
SMJ320C6203 Description
Fixed-Point Digital Signal Processor
SMJ320C6203 Vendor
Texas Instruments
SMJ320C6203 Features
  • High-Performance Fixed-Point Digital Signal Processor (DSP) – SMJ320C62x™
    • 5-ns Instruction Cycle Time
    • 200-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 1600 Million Instructions Per Second (MIPS)
  • 429-Pin Ball Grid Array (BGA) Package (GLP Suffix)
  • VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) C62x™ DSP Core
    • Eight Highly Independent Functional Units:
      • Six Arithmetic Logic Units (ALUs) (32-/40-Bit)
      • Two 16-Bit Multipliers (32-Bit Result)
    • Load-Store Architecture With 32 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-, 16-, 32-Bit Data)
    • 8-Bit Overflow Protection
    • Saturation
    • Bit-Field Extract, Set, Clear
    • Bit-Counting
    • Normalization
  • 7M-Bit On-Chip SRAM
    • 3M-Bit Internal Program/Cache (96K 32-Bit Instructions)
    • 4M-Bit Dual-Access Internal Data (512K Bytes)
      • Organized as Two 256K-Byte Blocks for Improved Concurrency
  • Flexible Phase-Locked-Loop (PLL) Clock Generator
  • 32-Bit External Memory Interface (EMIF)
    • Glueless Interface to Synchronous Memories: SDRAM or SBSRAM
    • Glueless Interface to Asynchronous Memories: SRAM and EPROM
    • 52M-Byte Addressable External Memory Space
  • Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel
  • 32-Bit Expansion Bus
    • Glueless/Low-Glue Interface to Popular PCI Bridge Chips
    • Glueless/Low-Glue Interface to Popular Synchronous or Asynchronous Microprocessor Buses
    • Master/Slave Functionality
    • Glueless Interface to Synchronous FIFOs and Asynchronous Peripherals
  • Three Multichannel Buffered Serial Ports (McBSPs)
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • ST-Bus-Switching Compatible
    • Up to 256 Channels Each
    • AC97-Compatible
    • Serial-Peripheral Interface (SPI) Compatible (Motorola™)
  • Two 32-Bit General-Purpose Timers
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 0.15-um/5-Level Metal Process
    • CMOS Technology
  • 3.3-V I/Os, 1.5-V Internal
SMJ320C6203 Datasheet and Application Notes
ParameterValue
Cycle Time (ns)5.6
Data/Program Memory (bits)4M/3M
DMA4
External Memory Interface(1) 32-bit
Host Port / Exp. Bus / PCIExp.Bus 32-bit
McBSP3
Timers(2) 32-bit
Core Supply (Volts)1.5
IO Supply (Volts)3.3
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