| SMJ320VC5416 Description |
| SMJ320VC5416 Fixed-Point DSP |
| SMJ320VC5416 Vendor |
| Texas Instruments |
| SMJ320VC5416 Features |
- Processed to MIL-PRF-38535 (QML)
- Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus
- 40-Bit Arithmetic Logic Unit (ALU) Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators
- 17 x 17-Bit Parallel Multiplier Coupled to a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation
- Compare, Select, and Store Unit (CSSU) for the Add/Compare Selection of the Viterbi Operator
- Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle
- Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
- Data Bus With a Bus Holder Feature
- Extended Addressing Mode for 8M x 16-Bit Maximum Addressable External Program Space
- 128K x 16-Bit On-Chip RAM Composed of:
- Eight Blocks of 8K x 16-Bit On-Chip Dual-Access Program/Data RAM
- Eight Blocks of 8K x 16-Bit On-Chip Single-Access Program RAM
- 16K x 16-Bit On-Chip ROM Configured for Program Memory
- Enhanced External Parallel Interface (XIO2)
- Single-Instruction-Repeat and Block-Repeat Operations for Program Code
- Block-Memory-Move Instructions for Better Program and Data Management
- Instructions With a 32-Bit Long Word Operand
- Instructions With Two- or Three-Operand Reads
- Arithmetic Instructions With Parallel Store and Parallel Load
- Conditional Store Instructions
- Fast Return From Interrupt
- On-Chip Peripherals
- Software-Programmable Wait-State Generator and Programmable Bank-Switching
- On-Chip Programmable Phase-Locked Loop (PLL) Clock Generator With External Clock Source
- One 16-Bit Timer
- Six-Channel Direct Memory Access (DMA) Controller
- Three Multichannel Buffered Serial Ports (McBSPs)
- 8/16-Bit Enhanced Parallel Host-Port Interface (HPI8/16)
- Power Consumption Control With IDLE1, IDLE2, and IDLE3 Instructions With Power-Down Modes
- CLKOUT Off Control to Disable CLKOUT
- On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1(JTAG) Boundary Scan Logic
- 164-Pin Ceramic Quad Flatpack (CQFP) (HFG Suffix)
- 10-ns Single-Cycle Fixed-Point Instruction Execution Time (100 MIPS)
- 3.3-V I/O Supply Voltage
- 1.5-V Core Supply Voltage
- –55°C to 115°C Operating Temperature Range, QML Processing
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| SMJ320VC5416 Datasheet and Application Notes |
|
| Parameter | Value |
| Frequency (MHz) | 100 |
| MIPS | 100 |
| Cycle Time (ns) | 10 |
| Data / Program Memory Space (Words) | 64K/8M |
| RAM (Words) | 128K |
| ROM (Words) | 16K |
| DMA | 6-Chan Ext |
| Timers | 1 |
| Total Serial Ports | 3 |
| Buffered Serial Ports | 3 McBSPs |
| COMM's I/F | HPI 8/16 |
| Boot Loader Available | YES |
| Core Supply (Volts) | 1.5 |
| IO Supply (Volts) | 3.3 |
| Products related to SMJ320VC5416 |
| SMJ320VC5416HFGW10 5962-0153001QXA SM320VC5416HFGW10 |