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TAS5504PAGR

TAS5504PAGR Description

TAS5504PAGR Description

TAS5504PAGR Description

TAS5504PAGR Categories

TAS5504PAGR Manufacturer

TAS5504PAGR Datasheet (PDF)

TAS5504PAGR Price & Availability


Check TAS5504PAGR Price & Availability at Canics

TAS5504PAGR Features

  • Audio Input / Output
    • Automatic Master Clock Rate and Data Sample Rate Detection
    • Four Serial Audio Input Channels
    • Four PWM Audio Output Channels
    • Headphone PWM Output to Drive an External Differential Amplifier Like the TPA112
    • PWM Outputs Support Single Ended and Bridge Tied Loads
    • 32-, 38-, 44.1-, 48-, 88.2-, 96-, 176.4-, and 192-kHz Sampling Rates
    • Data Formats: 16-, 20-, or 24-bit input Data Left, Right and I2S,
    • 64 x Fs Bit Clock Rate
    • 128, 192, 256, 384, 512, and 768 x Fs Master Clock Rates (Up to a Maximum of 50 MHz)
  • Audio Processing
    • 48-Bit Processing Architecture With 76 bits of Precision for Most Audio Processing Features
    • Volume Control Range +36 dB to &@150;127 dB
      • Master Volume Control Range of +18 dB to -100 dB
      • Four Individual Channel Volume Control Range of +18-dB to -127-dB
    • Programmable Soft Volume and Mute Update Rates
    • Four Bass and Treble Tone Controls with ±18-dB Range, Selectable Corner Frequencies, and 2nd Order Slopes
      • L, R, and C
      • LS, RS
    • Configurable Loudness Compensation
    • Two Dynamic Range Compressors With Two Thresholds, Two Offsets, and Three Slopes
    • Seven Bi-quads Per Channel
    • 8x4 Input Crossbar Mixer. Each Signal Processing Channel Input Can Be Any Ratio of the Eight Input Channels
    • 4x2 Output Mixer - Channels 1 and 2. Each Output Can Be Any Ratio of Any Two Signal Processed Channels
    • 4x3 Output Mixer - Channels 3 and 4. Each Output can be Any Ratio of Any Three Signal Processed Channels
    • Three Coefficient Sets Stored on the Device Can be Selected Manually or Automatically (Based on Specific Data Rates)
    • DC Blocking Filters
    • Able to Support a Variety of Bass Management Algorithms
  • PWM Processing
    • 32-Bit Processing PWM Architecture With 40 Bits of Precision
    • 8x Oversampling With 5th Order Noise Shaping at 32 ? 48 kH

TAS5504PAGR Parameters

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