| TFP401APZP Description |
| PanelBus DVI Receiver 165MHz, HSYNC fix |
| TFP401APZP Vendor |
| Texas Instruments |
| TFP401APZP Features |
- Supports UXGA Resolution (Output Pixel Rates Up to 165 MHz)
- Digital Visual Interface (DVI) Specification Compliant1
- True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
- Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
- Skew Tolerant Up to One Pixel Clock Cycle
- 4x Over-Sampling
- Reduced Power Consumption - 1.8 V Core Operation With 3.3 V I/Os and Supplies2
- Reduced Ground Bounce Using Time Staggered Pixel Outputs
- Lowest Noise and Best Power Dissipation Using TI PowerPAD™ Packaging
- Advanced Technology Using TI 0.18-µm EPIC-5™ CMOS Process
- TFP401A Incorporates HSYNC Jitter Immunity3
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| TFP401APZP Datasheet and Application Notes |
|
| Parameter | Value |
| Type of Line Circuit | Transition Minimized Differential Signaling |
| Serial Data Receiver Channels | 3 |
| Number of Parallel Outputs | 48 |
| PLL Frequency (MHz) | 25 to 165 |
| Data Throughput (MB/s) | 495 |
| ICC (mA) | 400 |
| Supply Voltage(s) (V) | 3.3 |
| Pin/Package | 100HTQFP |
| Approx. 1KU Price (US$) | 4 |
| Status | ACTIVE |
| Temp (oC) | 0 to 70 |
| Budget Price ($US) | QTY | 4.00 | 1KU |
| Package Type | Pins | HTQFP (PZP) | 100 |
| STD Pack QTY | 90 |
| Products related to TFP401APZP |
| TFP401PZP TFP401A TFP401 |