TLK2208A Datasheet

Eight 1.0- to 1.3-Gigabits Per Second (Gbps) Synchronizable Transceivers
Low Power Consumption <1.3 W at 1.25 Gbps
IEEE 802.3z Gigabit Ethernet Compliant
Differential VML Transmit Outputs With No External Components Necessary. PECL Compatible Levels
Programmable High-Speed Output Preemphasis Levels
Selectable Parallel Interface Modes:
- Nibble-Wide Double Data Rate (DDR) Clocking Interface
- Multiplexed Channel DDR Clock Interface
Selectable Clock Tolerance Compensation
Selectable On-Chip 8b/10b IEEE 802.3z Compliant Encoder and Decoder
JEDEC-Compliant 1.8-V LVCMOS (Extendable to 2.5 V)
3.6-V Tolerant Inputs on Parallel I/O
Internal Series Termination on LVCMOS Outputs to Drive 50- Lines
Comprehensive Suite of Built-In Testability Features (PRBS Generation and Verification, Serial Loopback, and Far-End Loopback)
IEEE 802.3 Clause 22 Management Data Interface (MDIO) Support
IEEE 1149.1 JTAG Support
Hot-Plug Protection on Serial I/O
No External Filter Components Required for PLLs
Small Footprint 19×19-mm, 289-Terminal, 1,0-mm Ball-Pitch BGA
Advanced Low-Power 0.18-ľm CMOS Technology
Commercial Temperature Rating (0°C to 70°C)

TLK2208A