MT9042C DescriptionMT9042C CategoriesMT9042C Manufacturer
MT9042C Price & Availability
MT9042C Features- Meets jitter requirements for: AT&T TR62411 Stratum 3, 4 and Stratum 4 Enhanced for DS1 interfaces; and for ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 for E1 interfaces
- Provides C1.5, C3, C2, C4, C8 and C16 output clock signals
- Provides 8 kHz ST-BUS framing signals
- Selectable 1.544 MHz, 2.048 MHz or 8 kHz input reference signals
- Accepts reference inputs from two independent sources
- Provides bit error free reference switching - meets phase slope and MTIE requirements
- Operates in either Normal, Holdover and Freerun modes
MT9042C DescriptionThe MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to either a 2.048 MHz, 1.544 MHz, or 8 kHz input reference. The MT9042C is compliant with AT&T TR62411 Stratum 3, 4 and 4 Enhanced, and ETSI ETS 300 011. It will meet the jitter tolerance, jitter transfer, intrinsic jitter, frequency accuracy, holdover accuracy, capture range, phase slope and MTIE requirements for these specifications.
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