| MT90823 Description | | 2048 x 2048 Channels Selectable Rate (2, 4, 8 Mbps) 3.3 V Non-blocking Large Digital Switch (LDX) | | MT90823 Vendor | | Zarlink Semiconductor | | MT90823 Categories | | | MT90823 Features | - 2,048 x 2,048 channel non-blocking switching at 8.192 Mbps
- Per-channel variable or constant throughput delay
- Automatic identification of ST-BUS/GCI interfaces
- Accept ST-BUS streams of 2.048, 4.096 or 8.192 Mbps
- Automatic frame offset delay measurement
- Per-stream frame delay offset programming
- Per-channel high impedance output control and message mode
- Control interface compatible to Motorola non-multiplexed CPUs
- Connection memory block programming
- 3.3 V local I/O with 5 V tolerant inputs and TTL-compatible outputs
- IEEE-1149.1 (JTAG) Test Port
| | MT90823 Applications | - Medium and large switching platforms
- CTI application
- Voice/data multiplexer
- Digital cross connects
- ST-BUS/GCI interface functions
- Support IEEE 802.9a standard
| | MT90823 Description | The MT90823 Large Digital Switch has a non-blocking switch capacity of: 2,048 x 2,048 channels at a serial bit rate of 8.192 Mbps; 1,024 x 1,024 channels at 4.096 Mbps; and 512 x 512 channels at 2.048 Mbps. The device has many features that are programmable on a per stream or per channel basis, including message mode, input offset delay and high impedance output control. Per stream input delay control is particularly useful for managing large multi-chip switches that transport both voice channel and concatenated data channels. In addition, the input stream can be individually calibrated for input frame offset using a dedicated pin. | | MT90823 Datasheet and Application Notes | |
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