| P60ARM-B Description |
| 32-bit RISC Microprocessor |
| P60ARM-B Vendor |
| Zarlink Semiconductor |
| P60ARM-B Categories |
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| P60ARM-B Features |
- 32 bit RISC processor
- 32 bit data bus
- 32 bit address bus
- Big and Little Endian operating modes
- High performance RISC - 21 MIPS sustained at 30 MHz (30 MIPS peak) at 5 V
- Low power consumption - 1.5 mA/MHz at 5 V fabricated in 1mm CMOS
- Fully static operation - ideal for power sensitive applications
- Fast interrupt response for real-time applications
- Virtual Memory System Support
- Excellent high-level language support
- Simple but powerful instruction set
- IEEE 1149.1 (JTAG) Boundary Scan to ease testing
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| P60ARM-B Applications |
- The P60ARM-B is ideally suited to those applications requiring RISC performance from a compact, power efficient processor
- Telecomms - eg GSM terminal controller
- Datacomms - eg protocol conversion
- Portable Computing - eg palmtop computer
- Portable Instruments - eg handheld data acquisition unit
- Automotive - eg engine management unit
- Consumer Multimedia - low cost controller
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| P60ARM-B Description |
The P60ARM-B is a low power, general purpose 32-bit RISC microprocessor. It is an implementation of the ARM6 macrocell, packaged in a 100 pin Metric Quad Flat Pack. Its simple, elegant and fully static design is particularly suitable for cost and power sensitive applications. |
| P60ARM-B Datasheet and Application Notes |
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