High performance RISC - 21 MIPS sustained at 30 MHz (30 MIPS peak) at 5 V
Low power consumption - 1.5 mA/MHz at 5 V fabricated in 1mm CMOS
Fully static operation - ideal for power sensitive applications
Fast interrupt response for real-time applications
Virtual Memory System Support
Excellent high-level language support
Simple but powerful instruction set
IEEE 1149.1 (JTAG) Boundary Scan to ease testing
P60ARM-B Description
The P60ARM-B is a low power, general purpose 32-bit RISC microprocessor. It is an implementation of the ARM6 macrocell, packaged in a 100 pin Metric Quad Flat Pack. Its simple, elegant and fully static design is particularly suitable for cost and power sensitive applications.